This blog is used for Y2 Mini-Project 26, EEE department, University of Liverpool.
The title of the project is Modelling Electrical Properties of the Thin High-k Gate Stacks
(HfSiO, 70%Hf).
The research group consists of three students, which are, Kaibin Ji, Fan Hu and Yizhou Jiang. Dr. Ivona Mitrovic is the supervisor of the project. This project will last for about 6 weeks, including a final report and a bench inspiration for assessment.
The main object of the project is to find out the electrical
properties of the thin high-k gate stacks (HfSiO 70% Hf), a new material may
replace SiO2 in the future for gate stack of MOSFET. There are 10 tasks need to
be completed in the future, the results will be posted in this blog
later.
If you have any questions or suggestions for the blog, please feel free to contact us.
If you have any questions or suggestions for the blog, please feel free to contact us.
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